Designing and Implementing SVMs for High-Dimensional Knowledge Discovery Using FPGAs

Support Vector Machines (SVMs)represent a robust and valuable tool for Machine Learning. SVMs are resilient to overfitting and can provide useful information for high-dimensional data when sufficient hyperplane margin can be identified. However, SVMs require substantial computational load for large datasets. This paper discusses SVMs, analyzing SVM results, and classification of high-dimensional data for the purpose of Knowledge Discovery. Furthermore, this paper considers implementation of SVMs using Field Programmable Gate Arrays (FPGAs). The approach described in this paper applies to high performance, high throughput and scalable implementations for big data. The paper provides design data for FPGA implementation of SVMs. Finally, an example is provided is based on the Xilinx UltraScale+ FPGAs to illustrate the concepts in this paper.