Towards an Integrated GPU Accelerated SoC as a Flight Computer for Small Satellites

Many small satellites are designed to utilize cutting edge technology with the goal of rapidly advancing space based capabilities. As a result, many components take advantage of developments from the miniaturization of smartphone technology. Within the past 2 years, the UGA Small Satellite Research Laboratory has extended this concept into embedded GPUs for high-performance processing in LEO. Here we showcase advances in our research of high-performance space-based computation by integrating a traditional flight computer with existing miniaturized GPU/SoC systems. Such a system paves the way for many of NASA's goals that require space based AI, neural networks, computer vision, and high performance computing. Our system fits a standard CubeSat PC/104+ form factor, and implements many standard protocols such as I2C, SPI, UART, and RS422. The system also has several GPIO pins, 2 USB-C ports, a micro USB port for flashing, an Ethernet port, and a micro SD card slot for development. Additionally, the system is designed to be modular, so that GPU accelerated SoCs can be stacked to form a distributed system. For our primary computer, which handles I/O and initializes processes on the SoC, we choose to use the radiation tolerant Smart Fusion 2 SoC with an ARM Cortex-M3 processor and a FPGA. In addition to this primary computer, we use the Nvidia Tegra X2/X2i as the GPU/SoC workhorse. The primary computer and the TX2i are designed to share memory space with peripherals mounted onto the board, so that no significant file transfer is required between the subsystems. Additionally, Nvidia's Pascal architecture enables GPU-CPU or GPU-GPU communication without PCIe, enabling dense interconnected networks for monitoring and computation. To address thermal concerns, we cap the TX2i's power draw at 7.5 Watts, provide recommendations for thermal interface materials, and ensure that the primary computer only enables the GPU/SoC when parallel computation is specifically requested. Furthermore, radiation mitigation techniques are explored with ECC, software mitigation techniques, and aluminized kapton sheets. In conclusion, this system is a step towards a miniaturized high-performance flight computer well suited for future computational demands.