FPGA Interconnect Resources Test Based on A Improved Ford-Fulkerson Algorithm

Interconnect resource(IR) test is one of the most crucial parts in Field Programmable Gate Arrays(FPGA ) test. The Ford-Fulkerson algorithm of graph theory has already been applied in FPGA IRs testing. However, with the expansion of the FPGA scale, the efficiency of the Ford-Fulkerson algorithm is reduced. This paper improves the Ford-Fulkerson algorithm by dividing the FPGA IRs into three graphs, the horizontal graph, the vertical one and the oblique one, which reduces the algorithm complexity in large-scale FPGAs. This improved algorithm has been verified on mathematic model of XC5V110T FPGA IRs. Compared to the previous test methods, the efficiency of this improved algorithm has raised by 8 times.