Intelligent Computing with RRAM

RRAM-based in-memory-computing is a promising approach to go beyond von Neumann architecture and attributes to remarkable improvement in power efficiency and performance density. In this work, we examine our developments in device optimization for high-linearity SET/RESET updating and analyze the device reliability issues. We further exhibit the experimental demonstrations for the perceptron and generative adversarial network (GAN), showing how to combine algorithms and non-idea devices together. An end-to-end simulator was set up to evaluate the system performance (the accuracy, latency and energy) with actual device performance. Lastly, we provide a guideline for array size optimization.