A 28-nm FD-SOI CMOS Variable-Gain Amplifier With Body-Bias-Based DC-Offset Cancellation for Automotive Radars

This brief presents a variable-gain amplifier (VGA) for automotive radar applications integrated in a 28-nm fully depleted (FD) silicon-on-insulator (SOI) CMOS technology. The amplifier operates at a power supply as low as 1 V and guarantees 30-dB linear-in-dB gain variation with a 3-dB step. The back-gate of the MOS transistors has been exploited to implement a backgate control-based offset cancellation loop, thus avoiding the use of inter-stage coupling capacitors that introduce frequency limitations due to parasitic capacitances. The VGA exhibits a bandwidth from 100 kHz to 20 MHz, which is compliant with typical frequency-modulated continuous wave (FMCW) radars. It also guarantees a 1-dB compression point (P
_1dB
) better than -36 dBm and an input-referred noise (IRN) of 12.5 nV/√Hz and 7 nV/√Hz at 1 MHz and 10 MHz, respectively, with a power consumption as low as 1.7 mW.