Optimization of Frequency-Scaling in Time-Triggered Multi-Core Architectures using Scenario-Based Meta-Scheduling

Nowadays, energy-efficiency, energy-management, and energy-saving are essential issues in embedded systems. Many real-time embedded systems need to adapt at run-time to critical events such as faults which may arise within the system or changing environmental conditions. Time-triggered systems are frequently used in safety-critical applications, because precomputed schedules improve predictability and fault containment. Nevertheless, flexibility and resource-efficiency can be conceded by shifting between static scenario-based schedules that are generated by meta-scheduling tools and techniques. Application models, platform models and context models are used by meta-scheduling tools to plan reactions to events and generate meta-schedules. An example of a significant event is dynamic-slack, which can be used to increase the energy-efficiency in systems by changing communication and execution time plans. While methods and algorithms for energy-efficiency, energy-management and energy-saving are used in many applications (e.g., mobile phones, smart TVs), their applicability is still restricted in safety-critical systems. In a multi-core chip, the NoC technology contributes significantly to the overall energy consumption of an MPSoC. Hence, this paper proposes a meta-scheduler for Dynamic Voltage and Frequency Scaling (DVFS) in time-triggered multi-core architectures. The evaluation of correctness and energy-efficiency for cores and routers is carried out experimentally and analytically for dynamic slack-events. The results are monitored, analyzed and validated with a meta-scheduling visualization tool (MeSViz).