Transient-Immune GaN Gate Driver and Power Layout

The Wide Band Gap devices present many advantageous characteristics like very fast switching speeds and lower losses compared to Si. However they introduce certain design challenges which differ from standard Si devices. These are due to relatively lower threshold gate voltages and consequent higher susceptibility against unwanted miller turn-on. This paper investigates and compares various layout designs for GaN gate driver loop and power loop using FEM study and justifies their improvements. Various layout design schemes are discussed and their effects in enhancing GaN gate driver immunity against adverse effects of very fast transients are also highlighted experimentally in a Phase Shifted Full Bridge Converter.