Noise Analysis of Multiplicative Distributed Amplifiers

This paper analyses the noise performance of cascaded and matrix single stage distributed amplifiers (C-SSDA and M-SSDA), together termed multiplicative distributed amplifiers. The analytical expressions derived are verified and applied in predicting the noise figure of a two- and three-tiered M-SSDA based on a full foundry model of an InP double heterojunction bipolar transistor (DHBT). Based on observations from the analytical study, we provide design considerations that optimise noise, gain and bandwidth performance for this class of distributed amplifiers, for improved utility in ultra-wideband applications.