A Review and Application of Integrity Techniques for Securing FPGA-based Designs

This paper is a review of the main integrity techniques used to secure designs based on the Field-Programmable Gate Array (FPGA) technology, such as Cyclic Redundancy Check (CRC) methods or Secure Hash Algorithms (SHA) functions. Also, this paper presents an application of these techniques using two FPGA boards: Basys 3 Artix-7 FPGA Trainer Board (new generation) and Spartan-3E Starter Board (old generation). Design and implementation of this application uses Vivado Design Suite software for Artix-7 and ISE Design Suite for Spartan-3. Data is transmitted from the first board to the second board and then to a PC while performing integrity tests.