Maximum/minimum signal selector for competitive learning neural network

A sixteen-input maximum/minimum selector circuit is designed, based on multi-input current comparators, implemented in MOSIS 2 um CMOS, n-well technology. It operates with input-signal range 1.6-to-3.6 V, with a 5 V supply. The circuit is developed for possible applications in competitive learning neural networks (NNs) for sensors output interface: (1) as a preprocessor; for crude classification of sensor outputs-the circuit operates as a maximum value selector to compute the infinity norm of the distance between the input features and corresponding neural synaptic strength; (2) as a post processor, minimum distance value selector to determine the competitive winning neuron. Experimental measurements have been favorable.