FPGA Implementation of RDMA-Based Data Acquisition System Over 100-Gb Ethernet

This paper presents remote direct memory access (RDMA) over the Ethernet protocol used for data acquisition systems, currently under development at the European Synchrotron Radiation Facility. The protocol is implemented on Xilinx Ultrascale + field-programmable gate arrays (FPGAs), thanks to the 100G hard media access controller (MAC) internet protocol (IP). The proposed protocol is fairly compared with the well-known RDMA over converged Ethernet (RoCE-V2) protocol using a commercial network adapter from Mellanox. The obtained results show the superiority of the proposed algorithm over RoCE-V2 in terms of data throughput. Performance tests on the 100G link show that it can reach a maximum stable link performance of 90 Gb/s with minimum packet sizes greater than 1 kB and 95 Gb/s for packet sizes greater than 32 kB.