Gold Passivated Cu-Cu Bonding At 140°C For 3D IC Packaging And Heterogeneous Integration Applications

In the present modern era of electronic industry has motivated for high performance integration by vertically stacked three dimensional integrated circuits (3D ICs). Electronic interconnections at packaging and die levels, Pbfree solder micro bumps are intended to replace conventional Pb-containing solder joints due to increasing awareness of an environmental conservation, and processing at low thermal budgets. The better alternative for solder is copper, due to its high electrical and thermal properties. But the surface oxidation was the major bottleneck. In this work, we have demonstrated low temperature and low-pressure copper to copper interconnect bonding using optimized thin gold passivation layer. Here the passivation layer over the copper surface was optimized to a thickness of 3nm there by helps in preventing Cu surface oxidation and makes lower surface RMS roughness. High-density surface plane orientations that have been studied using XRD helped in faster diffusion through an interface. Majorly in this work, we have discussed the time taken for copper atoms to diffuse over the ultra-thin passivation layer of gold using Fick’s second law approximation. These conditions have been used while bonding. Bonded samples were subjected to various reliability studies in order to confirm the efficacy of the proposed Au passivation based bonded structure. Also, we have observed the Interface quality using TEM, and C-SAM (mode C-Scanning acoustic microscopy) imaging resulting in good quality of bonding. The diffusion of copper atomic species movement across the interface is confirmed by EDS analysis. Low and stable specific contact resistance ($\sim$1.43 $\times$ 10-8 $\Omega$ cm²) at robust conditions are confirmed to be effective and front runner for low temperature, low pressure Cu-Cu bonding for 3D IC packaging and heterogeneous integration.