Implementation Of Aes Coprocessor For Wireless Sensor Networks

Wireless sensor networks (wsn) are increasingly becoming very attractive for different domain such as military, agriculture, medicine, floods detection, weather forecasting ...etc. data in WSN are transmitted wirelessly, making them vulnerable to several attacks, which oblige the involvement of an encryption algorithm. the most used encryption algorithm in wsn is AES (advanced encryption standard) since it meets the requirements of WSN nodes. in order to provide a satisfactory level of security, and ensure the confidentiality of data transmitted in the WSN, we have presented, in this paper, an FPGA implementation of aes-128 encryption and decryption coprocessor. This Coprocessor is a designed logic block ready to use in any FPGA (field programmable gate arrays) device, or even in co-designed applications using soft-cores such as Microblaze. Results show that the throughput, the utilized FPGA resources and the power consumption are suitable for WSN applications.