Area-efficient K-Nearest Neighbor Design using Stochastic Computing

Among various machine learning techniques, K-Nearest Neighbor (KNN) has been widely exploited for many artificial intelligence applications. However, due to the intensive use of multiplications during its computing procedure, KNN algorithm is typically computation-intensive and thereby posing severe challenge for its efficiency in hardware performance in terms of area and power consumption. To address this challenge, this paper proposes to design an area-efficient low-power stochastic KNN hardware accelerator. By leveraging stochastic computing (SC) technique, the basic computation components of KNN classifier are replaced by simple stochastic logic circuits such as XNOR and MUX gate. Moreover, we propose a low-cost architecture for binary-to-stochastic (B-to-S) interface and develop an Approximate Parallel Accumulator (APA) for stochastic-to-binary (S-to-B) module, which can further improve the hardware performance for the stochastic design. Experimental results demonstrate that the proposed stochastic KNN design achieves higher area efficiency and lower power consumption as compared to the non-stochastic design. Also, it remains high task accuracy with negligible performance loss.