Digital Design using CMOS and Hybrid CMOS/Memristor Gates: A Comparative Study

Memristor is a passive element with two terminals, where the magnetic flux is related to the amount of the electric charge passed through the device. Memristive technologies are valuable as they are scalable, non-volatile and compatible with CMOS. In this paper, AND, OR and XOR logic gates which are the seed of any digital design are simulated using memristor, the used memristor model is Voltage ThrEshold Adaptive Memristor (VTEAM), to compare between memristor-based designs and the known CMOS-based logic gates knowing that CMOS technology used is TSMC 65 nm. A few parameters such as propagation delay, power consumption, number of devices used in each circuit have been calculated and studied in both approaches. The proposed logic shows lower power consumption and better area utilization compared to 65 nm CMOS logic circuits operating at standard 1.2 V. Our simulations were run using Cadence Virtuoso IC6.1.4 simulator.