Strategy Design for Controlling On-Chip Photonic Circuits

This paper does an extensive analysis of high-speed bipolar junction transistor which includes the structure of the transistor and doping concentration of each region. The main limitations of the desired characteristic are parasitic capacitance and carrier recombination regions. The gain of the amplifier will decrease as the operation frequency increase because of the parasitic capacitance. The bipolar junction transistor design is mainly aiming to reduce the parasitic capacitance and ensure that the recombination occurs at collector region. Furthermore, a photonic circuit is introduced in the project. The photonic circuit is unstable because of a susceptible cavity. The circuit can be enhanced by introducing a feedback control circuit. This work will also use the designed BJT to construct a feedback control circuit which includes a differential amplifier and a reference current generator. The feedback control circuit will not only make the photonic circuit stable but also be efficient and low noise. The layout of the full feedback control circuit and the structure of the BJT are presented to illustrate the effectiveness of the designed strategy for controlling on-chip photonic circuits.