Gate Stacked FD-SOI MOS Structure for Better Controllability at High Frequencies

This paper presents the analysis on Analog and RF performance of Gate Stack and BOX Stack (GSBS) and Gate Stack (GS) Fully Depleted Silicon On Insulator (FD-SOI) MOSFET. Here stacking of Si₃N₄ (high-k) over SiO₂ layer is used to reduce the short channel effects (SCEs) as well as leakage currents and increase the controllability of the gate electrode on the channel. In the analysis of the analog and RF performance of the proposed structures, it is observed that transconductance (gm), cut off frequency (fT), transconductance frequency product (TFP) is improved by using gate stack while with the use of both gate and Box stacking its RF performance degraded. For high frequency application, stacking anywhere other than gate insulator will lead to degraded performance of the device. The structure is designed and analyse using ATLAS 2D TCAD tools.