Different operational transconductance amplifier topologies for obtaining very small transconductances

A family of CMOS Operational Transconductance Amplifiers (OTA's) have been designed for very small G/sub M/'s (of the order of nA/V) in the moderate inversion region of operation using several design schemes such as current division, floating gate input stages and bulk driven techniques. A detailed comparison has also been made among these schemes in terms of performance characteristics such as power consumption, active silicon area and signal to noise ratio (SNR). The design has been sent for fabrication in a 1.2 /spl mu/m n-well CMOS process with a power supply of 2.7 V.