Disturbance Rejection PID controller optimized using Genetic Algorithm for Time Delay systems

This paper presents a optimal solution of disturbance rejection PID controller using Genetic Algorithm method for time delay systems. Disturbance rejection PID controller has two goals first goal is to optimize a PID controller to reject the disturbance and second goal is for set point tracking. Therefore two separate controllers need to design one goal is for disturbance rejection and second goal is for set point tracking. Genetic Algorithm is used to find the optimum values of these two controllers. Optimum values are obtained by evaluating the individual controller separately. MATLAB/Simulink software is used to find the optimum values of PID controller.