A Review on Hybrid Network on Chip

System on chip revolution challenges the NOC engineers for designing scalable, dynamic, reliable interconnections of network. Due to the extensive growth of SOC techniques, large extent of IP modules are used in System-on-chip (SOCs) and these SOCs finds various applications. The bus based communication is not a suitable solution to meet throughput, required bandwidth and reduced Latency for multicore chips and highly intensive parallel communication systems. Nowadays, Network on chip (NOC) is a definite solution for parallel communication requirements. In this paper we review the various NOCs for wired, wireless and hybrid networks also techniques in NOCs that addresses the challenges of deadlock, adaptability of the network, power management, latency reduction and throughput improvement etc.