FPGA Based Architecture of Elliptic Curve Scalar Multiplication for IOT

The current era has an explosive growth in communications. Many applications like internet banking, personal digital assistants, mobile communication, smart carts need for security in resource-constrained environments. Elliptic curve cryptography (ECC) used as an excellent tool for cryptographic, because of the security and smaller key sizes when compared with other public key algorithms. The efficiency is largely affected by the underlying arithmetic primitives. This paper explores FPGA designs for two of the most important field primitives namely multiplication and inverse. The smallest programmable entity in an FPGA is the lookup table. A novel finite field multiplier based on the recursive Karatsuba algorithm is proposed. This proposed multiplier combines two variants of Karatsuba. The general Karatsuba multiplier has a large gate count but for small sized multiplications is compact because it utilizes LUT resources efficiently. For largely sized multiplications, the simple Karatsuba is efficient as it requires lesser gates. This proposed hybrid multiplier uses a simple algorithm for initial recursion and small-sized final multiplication has been performed using the general algorithm. While comparing with reported literature this multiplier obtains the best area time product.