Design and Physical Implementation of a Low Frequency On-Chip Oscillator

In this paper, a square wave with 10 kHz frequency is designed to be used as an on-chip oscillator for a Wireless Sensor Node System On Chip (WSN-SOC). The proposed circuit generates high-frequency oscillations without the need for any external crystal oscillator using a ring oscillator. An asynchronous counter is used as a frequency divider circuit to decrease the frequency of the oscillations to the desired frequency. A buffer at the output stage increases the net current so that the oscillator can drive multiple loads. The circuit is designed as per the full custom ASIC flow in the 180 nm technology library provided by the foundry - Semi-Conductor Laboratory, India. The schematic and the layout are done on the Cadence Virtuoso tool. Physical verification is performed using Mentor Graphics Calibre tool. Post-layout simulation is done using Synopsys HSpice tool. The post-layout simulations of the oscillator occupying an area of about 223um × 118 um, show a square wave with a frequency of 10.59 kHz, very close to the desired frequency, consuming 9.408 uW average power at 1.8 V supply.