Effect of gamma irradiation on leakage current in CMOS readout chips for the ATLAS upgrade silicon strip tracker at the HL-LHC

The increase of the leakage current of NMOS transistors in certain 130 nm CMOS technologies during exposure to ionizing radiation needs special consideration in the design of detector systems, as this can result in large increases in current and power dissipation. As part of the R& D program for the upgrade of the ATLAS inner tracker for the High Luminosity upgrade of the LHC at the CERN laboratory, a dedicated set of irradiations were carried out with the ⁶⁰Co gamma source at the Brookhaven National Laboratory. Measurements will be presented that characterize the increase in the digital leakage current in the 130 nm-technology ABC130 readout chips, as observed by other experiments. The variations of the current as a function of time and total ionizing dose were studied under different conditions, such as dose rate, temperature and power applied to the chip. The ranges of variation of dose rates and temperatures were set to be as close as possible to those expected at the High Luminosity LHC, i.e. in the range 0.6 krad -2.5 and between -10° and +10° C. Some of the chips under test had been pre-irradiated with high doses of X-rays at Rutherford Appleton Laboratory in order to study the different effect of radiation on un- and pre-irradiated devices. The results show unique features, e.g. current peak value and current peak time dependence on dose rate, no change in current when temperatures are raised from -10° to +10° C after the current peak is reached and no increase in current on pre-irradiated chips. These results provide valuable information for the understanding of the underlying mechanisms responsible for radiation damage in transistors and detector readout chips. Models that attempt to parameterize the leakage current under different environmental conditions and how they fit to experimental data will be also presented.