Design of a configurable order statistic filter with FPGAs

The efficiency and properties of nonlinear digital filters are difficult to quantify with formal methods. Therefore, determining the effects of a nonlinear digital filter on overall system performance often requires simulations or prototyping. This paper presents a fast way to design a configurable order statistic filter with field programmable gate arrays (FPGAs) in a unified computer-aided design environment. Based on an innovative architecture, a window size nine, eight-bit filter fits in a single small and inexpensive component.