Investigation and Comparison of Bus Alternatives for Asynchronous Circuits

Increasingly complex functionality of integrated chips has challenged synchronous designs and accelerated demands for asynchronous architectures. Asynchronous integrated circuits (ICs) can operate reliably without a clock and in a wider range of environments than synchronous ICs while maintaining potential for low power consumption, improved performance, and high modularity. In this paper, two alternatives for transferring data in an asynchronous system are implemented using the NULL Convention Logic and compared to the typical bus architecture.