Unfolding and Folding: a New Approach for Code Restructuring targeting HLS for FPGAs

FPGAs are becoming a popular solution for accelerating the execution of software applications. The use of high level synthesis (HLS) tools intends to provide levels of abstraction comfortable to software developers when targeting FPGA-based hardware accelerators. However, the need to restructure the software code and to use adequate directives require both mastering the HLS tool used and FPGA hardware. This paper presents our efforts to provide a new approach for code restructuring, intended to help software developers in achieving efficient hardware implementations. Our approach uses an unfolded graph representation, which is generated from program execution traces, together with graph-based optimizations such as folding to generate suitable C code to input to HLS tools, such as Vivado HLS. The experiments show that our approach is capable of generating C code that results in efficient hardware implementations only otherwise achievable using manual restructuring of the input software code and manual insertion of adequate directives.