Implementation of Partial Reconfiguration Based on FPGA

In the application of FPGA, some FPGA modules that do not work at the same time have to allocate FPGA hardware resources for them. To this point, this article based on the Xilinx Zynq-7000 design partial reconfiguration to constitute a general operation unit. The units are, the frequency, period and duty cycle measurement module, the low-pass filter module, the basic floating-point operation module. This article focuses on the design of Vivado tool command language to achieve three modules based partial reconfiguration technology; also describes the development of system software architecture with Vivado Suite SDK. Through the test and comparative analysis of resource consumption, it proves the result is correct and FPGA resource utilization is improved, which means that the design reaches the desired results, and has a certain value for the reconfiguration research.