Alternate Approach to Prediction of IC Failures Using Silicon Based Degradation Mechanisms

Microcircuits designed and manufactured with advanced Complementary Metal Oxide Semiconductor (CMOS) technology, i.e., with feature sizes less than 50 nanometers (nm), are susceptible to early wearout. Traditionally, this has not been a serious concern for most commercial, industrial, and consumer products because the wearout did not occur within the typical lifetimes of the products, and because their operating conditions were relatively benign. Since those markets are large, microcircuit manufacturers targeting them have taken the necessary steps to assure that wearout is not a serious problem for their targeted customers. Aerospace, defense, and high performance (ADHP) products are different: service lifetimes can be decades long, operating conditions are rugged, and consequences of failure are high. Furthermore, aerospace markets are typically too small to warrant the attention and interest of the microcircuit manufacturers who target their products for commercial, industrial, and consumer markets. This paper describes how the ADHP industries have addressed microcircuit wearout through research to understand the problem; to develop analytical methods and software to quantify the effects of wearout in ADHP electronics system designs; and to use the results in system safety, certification, and reliability analyses. The results of the research and development described here have been captured in an Aerospace Recommended Practice (SAE ARP6338), that standardizes a common approach to analyze and mitigate the effects of early microcircuit wearout in ADHP applications. The ARP6338 process has been incorporated into a software tool.