Development of Application Function Blocks for Power-Hardware-in-the-Loop Testing of Grid-Connected Inverters

This paper presents standard Application Function Blocks (AFBs) for Power-Hardware-In-the-Loop (PHIL) testing of grid-connected inverters. The main objective is to develop standard AFBs that can be used as an interface between PHIL simulation and hardware. A critical feature of the AFBs is the ability to be reused and reconfigured with minimal effort for various PHIL tests. The PHIL interface includes five AFBs: power amplifier protection, PHIL interfacing compensation, analog output conditioning, analog input conditioning, and device under test (DUT) energy generation model. The design and development of each AFB is presented in detail for PHIL researchers. A test procedure is provided to aid in replicating the work and to guarantee safe operation. Experimental results of testing the battery and PV inverters demonstrate the effectiveness of the developed AFBs. A discussion on the reusability and reconfigurability of AFBs is presented, showing the value of using standard AFBs for accelerating the PHIL test.