Optimal clustering and statistical identification of defective ICs using I/sub DDQ/ testing

Instead of relying on setting an arbitrary threshold current value as in traditional loop testing, clustering based test technique relies on the characteristics of an IC with respect to all the other ICs in a lot to make a test decision. An improvement in the cluster analysis technique for I/sub DDQ/ testing is presented. Results of applying this technique to data collected on a high volume graphics chip are presented. The results are also compared against a newer more innovative form of I/sub DDQ/ testing.