An Architecture for Analog VLSI Implementation of Embedded Model Predictive Control

This work proposes an analog very large scale integration (VLSI) circuit for ultra fast embedded Model Predictive Control (MPC). The proposed architecture emulates a fixed-point iterative scheme for quadratic programming that can be regarded as a Euler step of a set of nonlinear differential equations. This framework can be realized using analog computational primitives comprising of complementary metal-oxide semiconductor (CMOS) transistors configured as Operational Transconductance Amplifiers (OTAs) and capacitors. ORCaD PSpice simulations demonstrate both the architectural simplicity and the computational efficiency of the proposed scheme.