Fault tolerant electronic engine controller

At present, the world trend in the development of electronic regulators of aircraft engines (electronic engine controllers - EEC) is the transition to a fully electronic control system, to the “Full Authority Digital Engine Control System” (FADEC). To improve the reliability of FADEC, in addition to channel-level redundancy, additional redundancy is offered at the transistor level. The problem is the observance of the Mead-Conway constraints on the number of consecutively connected transistors. Usually these are four transistors, but in generators of logical functions LUT (Look up Table) of programmable logic integrated circuits, this restriction is assumed equal to three. Another way to improve the reliability of FADEC is to use a sliding backup, the capabilities of which provide modern FPGAs. In this case, it is possible to restore the LUT due to the use of residual functionality. Therefore, it is possible to use a workable half of the LUT, and from these “halves” to replenish the reserve of elements. The use of redundancy at the transistor level allows to significantly increasing the probability of trouble-free operation of FPGAs used in EEC. However, this requires substantial redundancy and compliance with the Mead-Conway constraints. A less redundant option may be a sliding reservation in the FPGA EEC, which can ensure the restoration of the failed channel (with possible performance degradation) and use it to control the command channel during the flight. The variants of EEC reservation and methods for optimizing the probability of failure-free operation are considered.