A design of decentralized dual mode redundant hot standby arbitration switch-over logic and architecture

Dual mode redundancy hot standby is a common fault-tolerant technology. The systems which adopt this technology usually include an arbitration subsystem except functional subsystems. To avoid the potential risk of single point failure caused by the arbitration module and improve reliability, this paper aims to design a decentralized arbitration dual redundant hot standby structure as well as FPGA control logic to achieve state detection and arbitration switch-over between two subsystems, which can bring higher reliability and more convenience when performing tests. The paper firstly present detail implementation of hardware architecture and control logic. Then, simulation and synthesis are proceeded to verify the functionality and validity of the logic. At last, the hardware is debugged together with software. Practical tests show that the switch-over function of the control logic is valid and reliable.