Analytical modeling of threshold voltage for double gate MOSFET

The field effect transistor fabricated in integrated circuits are majorly with junctions. Due to scaling of devices, these junctions have becoming increasingly difficult to fabricate. And also high doping concentration gradient is the stringent requirement for smooth functioning of the device. The newer devices have been proposed and demonstrated in which there are no junctions and no gradients of doping. One such device is the Double Gate Metal Oxide Semiconductor Field Effect Transistor (DG-MOSFET) without junction which shows remarkable performance against short channel effects such as threshold voltage roll-off, Drain Induced Barrier Lowering (DIBL), etc. In this paper, a two dimensional model of threshold voltage is considered to study the performance of DG-MOSFET. The model used shows how the DG-MOSFET parameters such as the gate channel length, gate oxide thickness, drain to source voltage, and channel thickness, affect the threshold voltage degradation.