A predictive model to investigate the effects of gate driver common mode currents in SiC MOSFET based converter

Though desirable, fast switching speeds of SiC MOSFETs can cause significant common mode currents through the gate driver circuitry. This can deteriorate the signal integrity of the whole converter. The Present paper proposes a predictive model to estimate these common mode currents and the corruption in the signal integrity. Further, the presented model is used to investigate the impact of common mode choke placed at various positions in the gate driver. The predictions of the proposed model are verified both in simulation as well as in the hardware test set up.