High-Gain Hybrid CMOS Inverters by Coupling Cosputtered ZnSiSnO and Solution-Processed Semiconducting SWCNT

In this paper, high-gain hybrid complementary inverter was first designed and fabricated by coupling cosputtered ZnSiSnO and solution-processed semiconducting single-walled carbon nanotubes (SWCNTs). Field-effect transistors with ZnSiSnO and SWCNT networks show high electrical performance and acceptable bias stability. ZnSiSnO thin-film transistor shows field-effect mobility of 11.6 cm
²
/V · s, threshold voltage of 0.98 V, and subthreshold swing of 0.18 V/decade. The corresponding values for the SWCNT transistor are 10.2 cm
²
/V · s, 0.59 V, and 0.21 V/decade, respectively. The ZnSiSnO/SWCNT inverter shows excellent performance with a voltage gain of 41.5, a high noise margin of 2.62 V, and a low noise margin of 1.86 V at a small VDD of 5 V. The peak consumption is only 3.2 × 10
^-8
W at VDD = 5 V. Our finding underscores the coupling of cosputtered ZnSiSnO and solution-processed semiconducting SWCNT as an alternative strategy to the high-performance inverter development and has the potential for widespread technological applications.