Nanoscale heat transfer in MOSFET transistor with high-k dielectrics using a non linear DPL heat conduction model

In the present work, a one dimensional numerical study of nanoheat transfer in Metal / Oxide / Semiconductor / Field Effect Transistors (MOSFET) structures has been investigated. Several heat conduction models, such as Fourier, Single Phase lag (SPL) and Double Phase Lag (DPL) models, are developed and solved numerically using finite difference method. The numerical results calculated with our Matlab code are compared with those available in literature. A simulation of characteristic parameter's effect of DPL equation particularly the Knudsen number and time on local maximum temperature is discussed. The effect of the temperature-jump boundary condition is also used in order to consider the boundary phonon scattering at nanoscale. The effect of adding a layer of high-k material between the gate and the silicon leads to a considerable improvement in the temperature performance compared to that in conventional MOSFET transistors. The presented data of simulation are useful in designing the nano-transistor in order to reduce the self heating effect.