HDL implementation of high performance 16 bit processor on FPGA

In this work a general purpose 16 bit processor is designed and simulated on two 28nm technology based FPGA's i.e. Atrix 7 and Kintex 7. Xilinx 14.2 has been used as the design tool. Major functional blocks of the processor i.e. ALU (arithmetic and logical unit), Register, Control Unit, Decoder and PC (program counter) unit are separately designed. It has a 5 stage pipeline to increase the speed of the processor. These modules are combined and tested using the Vivado Simulator of the Xilinx 2014.2. The outputs of the two devices are compared on the power and delay. The results show that while Kintex-7 is faster in terms of both maximum delay and clock skew, it has higher power dissipation as compared to Atrix-7 FPGA.