Negative body biased comparator design for biomedical applications

In this paper, we propose a new comparator design called negative body biased charge sharing dynamic latch comparator for biomedical applications. Here, body biasing technique is implemented to the NMOS transistors of charge sharing dynamic latch comparator. It increases the threshold voltage of the transistors and as a result, the sub threshold current decreases and there is an overall reduction in power dissipation of the circuit. The power dissipation is reduced approximately 26.8% compared to the previous work. The advantage of this technique is that, the body biasing for NMOS transistors is provided with the help of the reference voltage source already present in the circuit, so there is no need for an additional voltage source in order to provide body bias. Simulation results have been obtained using 180nm technology in Mentor Graphics tool.