Design and analysis of logic gates using single electron nano-devices

Single electron semiconductor device is a 3 terminal Nano-electronic device which might offers low power consumption with high operative speed. SET can retain its scalability and management the motion of individual electrons. In this paper, we have given the simulated and comparative analysis study of logic gates with the mix of typical CMOS devices, SET and also in hybrid circuits. The logic gates are NOT, NOR and NAND designed and simulated using SPICE machine and analysed the performance.