Methods and algorithms of design on domestic FPGAs with given restrictions on routing resources

Currently, the development and production of domestic programmable logic integrated circuits (FPGA) is actively developing. The FPGA discussed in this article have significant architectural features that must be taken into account when designing on their basis. Therefore, the existing computer-aided design (CAD) system needs a serious improvement. In this article we discuss the design flow that includes components of existing software for semi-automatic design and provides an ability to design on FPGAs with limited routing resources. The design flow for integrated circuits on FPGAs is based on the development of an interface in a tool command language (TCL) for semi-automatic placement of logic elements, and also uses a modified algorithm PathFinder for routing interconnections. A characteristic feature of this route is that it is not adapted to a particular manufacturer and can be used for any FPGA architecture. The simulation results show the effectiveness of the developed algorithms.