Secure Neural Circuits to Mitigate Correlation Power Analysis on SHA-3 Hash Function

Correlation Power Analysis, is recently demonstrated as a viable attack model for Keccak, which is the new hash function selected by NIST for SHA-3. Early studies show that CPA attacks can be launched on this algorithm with conventional CMOS implementations. To mitigate such power attacks, in this research we propose secure neural primitives using memristor neural logic blocks. Five different mitigation techniques are proposed, including baseline dualcore design, theta Plane Masking, neural logic block based theta Plane Masking, Analog neural logic block theta Plane Masking, and Analog dual-neural logic block theta Plane Masking. A framework for the CPA attack was designed and the mitigation techniques were assessed based on the number of power traces used, correlation coefficients, confidence ratios, and transistor count. Success rate of guessing a key during SHA-3 operations, while configured as a MAC, is used as a system benchmark. Secure neural primitives are shown to be robust to the CPA attacks.