Design of fully digital 3-bit flash ADC based on logic gates

A fully digital 3-bit flash analog to digital converter based on a digital comparator is presented in this paper. The digital comparator used in the proposed ADC is implemented by a new digital differential circuit which is formed by logic gates. The performance of the digital differential circuit as a comparator is verified by computer simulation. The simulation results of the proposed digital flash ADC show that the input voltage range is 225 Vp-p with a maximum sampling rate of 200 KS/s. The number of effective bits, SNDR, and SFDR of the proposed flash ADC are also achieved 2.73 bits, 18.2 dB, and 28.5 dB, respectively.