A new 13-bit 100MS/s full differential successive approximation register analog to digital converter (SAR ADC) using a novel compound R-2R/C structure

A novel and reliable high-resolution and high-speed SAR ADC is presented in this paper. In the proposed article, a new compound R-2R/C structure is utilized in order to achieve both high-resolution and high-speed SAR ADC simultaneously. As simulation results verify that, at 1.8 V and 100 MS/s sampling rate with a Nyquist input, the ADC achieves an SNDR of 76.1 dB as well. The power consumption and FOM parameter of the proposed ADC are 5.18mW and 9.65fJ per conversion step respectively. Meanwhile, 300 times iterations in the transient Monte-Carlo analysis are applied, too. Also, the maximum Integral Nonlinearity (INL) and the maximum Differential Nonlinearity (DNL) are -0.45/+0.56LSB and -0.44/+0.37 LSB respectively. Simulation results of the proposed structure are simulated using the HSPICE BSIM3 model of a standard 0.18μm CMOS process.