A novel approach for offset canceling in a high-speed four-quadrant MTL multiplier

In this paper a novel configuration for an absolutely offset-free four-quadrant current multiplier is introduced. The main idea is to compensate offset by adding its same value dynamically in opposite direction. The structure of multiplier is based on MOSFET Trans-linear Loop (MTL) in saturation region. Removing quiescent offset is the most important improvement in this topology and reduction of error to less than 0.45%, THD of less 0.33% and bandwidth of more than 415 MHz are other achievements. The circuit is designed with 1.8V supply voltage and consumes 185 μW that simulated using HSPICE with level 49 parameters in 0.18μm standard CMOS TSMC technology.