Comparison of the transconductance generation efficiency (g_{m}/I_{D}) versus current density for FinFET, InAs and GaN/InN TFETs. A gate length of 20 nm and a drain-sou...
Abstract:
A platform for benchmarking tunnel field-effect transistors (TFETs) for analog applications is presented and used to compare selected TFETs to FinFET technology at the 14...Show MoreMetadata
Abstract:
A platform for benchmarking tunnel field-effect transistors (TFETs) for analog applications is presented and used to compare selected TFETs to FinFET technology at the 14-nm node. This benchmarking is enabled by the development of a universal TFET SPICE model and a parameter extraction procedure based on data from physics-based device simulators. Analog figures of merit are computed versus current density to compare TFETs with CMOS for low-power analog applications to reveal promising directions for the system development. To illustrate the design space enabled by TFETs featuring sub-60-mV/decade subthreshold swing, two example circuits including a picopower common-source amplifier and an ultralow-voltage ring oscillator are demonstrated.
Comparison of the transconductance generation efficiency (g_{m}/I_{D}) versus current density for FinFET, InAs and GaN/InN TFETs. A gate length of 20 nm and a drain-sou...
Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits ( Volume: 4, Issue: 1, June 2018)
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