Optimal-depth threshold circuits for multiplication and related problems

Multiplication is one of the most fundamental operations in arithmetic and algebraic computations. We present depth-optimal circuits for performing multiplication, multioperand addition, and symmetric function evaluation with small size and restricted fan-in. In particular, we show that the product of two n-bit numbers can be computed using a unit-weight threshold circuit of fan-in k, depth 3 log/sub k/n+log/sub 2/d/log/sub 2/(1+/spl radic/5)-1+o(log/sub k/n+logd)+O(1), and edge complexity O(n/sup 2+1/d/log(d+1)), for any integer d>0. All the circuits proposed in this paper have constant depth when log/sub k/n is a constant and are depth-optimal within small constant factors for any fan-in k.