Passive design technique for tamper-resistant embedded system

Design of a tamper-resistant embedded system is an important goal, where the fear of potentially untrustworthy consumer exists inside the group of secure device users. If an embedded system is tamper-resistant, the producer will have a higher level of assurance that the consumer cannot modify the data of the secure device. We propose a passive design technique that can be used to protect important data against physical tampering. The main idea is to use a highly volatile connection matrix points to generate an encryption key and encrypt the data stored in memory using that encryption key. If someone tries to tamper the hardware, it will destroy the connection matrix points and hence data cannot be recovered. This technique does not rely on any back-up power supply so it provides economic benefit as well as improved reliability compared to battery based solutions. Data is stored in encrypted form to counter the tampering using memory scanning approach.