Identification of low order cascaded digital predistortion with different-structure stages for linearization of power amplifiers

This paper studies the linearization of a high nonlinear power amplifier (PA) using low order cascaded Digital predistortion (DPD). A 2-stage memory polynomial (MP) model DPD structure is analyzed with different identification methods. The identification order strongly influences the performance of DPD and the stage with the higher order of nonlinearity should be identified first. The linearization performances of the identified DPDs are evaluated on a Doherty power amplifier with a Long Term Evolution-Advanced (LTE) signal.