Design and implementation of FPGA based processor for wireless sensor nodes

The main constraints in nodes in the wireless sensor network are power consumption, reconfiguration, size and area. Commercial ASIC based Microcontrollers that are commonly used now-a-days cannot be used for this purpose and have motivated towards the design of FPGA based Processor for the Wireless Sensor nodes. In this paper, we have implemented Arithmetic Logic unit using FPGA processor. From the Simulation results we compared the power consumption, time taken (speed up) with the MSP 430 Micro controller.